In a field of digital television broadcasting, coded data such as video or audio is, after each packetized, multiplexed in a format capable of synchronous reproduction and is transmitted. As a multiplexed format, a transport stream (TS) of MPEG-2 Systems standard (NPL 1) or the like is known.
After a broadcast TS is demodulated in a receiver, when the TS is reproduced or recorded, it is necessary to synchronize a system clock on the reception side with a reference clock on the transmission side having a predetermined frequency such as 27 MHz. Specifically, the synchronous processing is processing in which a system clock is locked to a PCR (Program Clock Reference) included in the TS by using a PLL (Phase Locked Loop) or the like.
The processing in which the system clock on the reception side is synchronized with the reference clock on the transmission side is referred to as “clock recovery processing.” In addition, a circuit in which the clock recovery processing is performed is referred to as a “clock recovery circuit.” A configuration of the clock recovery circuit is, for example, disclosed in FIG. D.2 of NPL 1.
To stably lock the system clock to the PCR in the clock recovery circuit, it is necessary to suppress a transmission jitter (hereinafter, referred to as a PCR jitter) of PCR data input to the clock recovery circuit.